# 时钟
set_property -dict {PACKAGE_PIN G22 IOSTANDARD LVCMOS33} [get_ports clk]
create_clock -period 20.000 -name sys_clk_pin -waveform {0.000 10.000} -add {get_ports clk}

#clk引脚
set_property IOSTANDARD LVCMOS33 [get_ports clk]
set_property PACKAGE_PIN G22 [get_ports clk]
#rst_n引脚
set_property IOSTANDARD LVCMOS33 [get_ports rst_n]
set_property PACKAGE_PIN D26 [get_ports rst_n]
#sel[0] 
set_property IOSTANDARD LVCMOS33 [get_ports sel[0]]
set_property PACKAGE_PIN N21 [get_ports sel[0]]
#sel[1] 
set_property IOSTANDARD LVCMOS33 [get_ports sel[1]]
set_property PACKAGE_PIN P23 [get_ports sel[1]]
#sel[2] 
set_property IOSTANDARD LVCMOS33 [get_ports sel[2]]
set_property PACKAGE_PIN N23 [get_ports sel[2]]
#sel[3] 
set_property IOSTANDARD LVCMOS33 [get_ports sel[3]]
set_property PACKAGE_PIN P24 [get_ports sel[3]]
#sel[4] 
set_property IOSTANDARD LVCMOS33 [get_ports sel[4]]
set_property PACKAGE_PIN N24 [get_ports sel[4]]
#sel[5] 
set_property IOSTANDARD LVCMOS33 [get_ports sel[5]]
set_property PACKAGE_PIN R22 [get_ports sel[5]]
#dig[0]
set_property IOSTANDARD LVCMOS33 [get_ports dig[0]]
set_property PACKAGE_PIN N22 [get_ports dig[0]]
#dig[1]
set_property IOSTANDARD LVCMOS33 [get_ports dig[1]]
set_property PACKAGE_PIN T24 [get_ports dig[1]]
#dig[2]
set_property IOSTANDARD LVCMOS33 [get_ports dig[2]]
set_property PACKAGE_PIN T25 [get_ports dig[2]]
#dig[3]
set_property IOSTANDARD LVCMOS33 [get_ports dig[3]]
set_property PACKAGE_PIN T22 [get_ports dig[3]]
#dig[4]
set_property IOSTANDARD LVCMOS33 [get_ports dig[4]]
set_property PACKAGE_PIN T23 [get_ports dig[4]]
#dig[5]
set_property IOSTANDARD LVCMOS33 [get_ports dig[5]]
set_property PACKAGE_PIN T20 [get_ports dig[5]]
#dig[6]
set_property IOSTANDARD LVCMOS33 [get_ports dig[6]]
set_property PACKAGE_PIN R20 [get_ports dig[6]]
#dig[7]
set_property IOSTANDARD LVCMOS33 [get_ports dig[7]]
set_property PACKAGE_PIN P19 [get_ports dig[7]]



 